The big-endian RISC-V Linux Adventure
328 | Thu 31 Jul 5:30 p.m.–6:15 p.m.
Presented by
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Ben Dooks
@bjdooks
http://www.fluff.org/ben/
Long time open source contributor to the Linux kernel, qemu and other projects for both work and personal fun. Experience in various hardware and board bringup on arm32, arm64, riscv64 and electronic design.
Ben Dooks
@bjdooks
http://www.fluff.org/ben/
Abstract
The latest RISC-V ISA specification allows for runtime configuration of the data endian between little and big. Since no one had done this before, we decided to investigate how difficult it would be to get an prototype Linux implementation running in big endian on an emulated RISC-V system such as under QEMU.
The talk goes from the description of the new ISA feature, our initial analysis and the modifications to software such as the Linux kernel, QEMU and OpenSBI that where needed. This then goes into the issues that we found and how to fix them. This includes kvm and how that works with mixed endian kvm instances, and the modifications to kvmtool to make this work.
We conclude with how the project went, what we published and a call to arms to continue testing and fixing outstanding issues.
The latest RISC-V ISA specification allows for runtime configuration of the data endian between little and big. Since no one had done this before, we decided to investigate how difficult it would be to get an prototype Linux implementation running in big endian on an emulated RISC-V system such as under QEMU. The talk goes from the description of the new ISA feature, our initial analysis and the modifications to software such as the Linux kernel, QEMU and OpenSBI that where needed. This then goes into the issues that we found and how to fix them. This includes kvm and how that works with mixed endian kvm instances, and the modifications to kvmtool to make this work. We conclude with how the project went, what we published and a call to arms to continue testing and fixing outstanding issues.